The present invention relates to a quantum-state readout circuit (or a quantum computation device) and a quantum-state measurement method for reading or measuring the quantum states of coupled charge quantum bits (qubits).
The qubit is a quantum two-level unit expressed by two levels of a quantum, namely, |0>, and |1>. An arbitrary quantum state |φ> is expressed by a superposition of |0> and |1>, that is, |φ>=α|0>+β|1>, where coefficients α and β satisfy the normalization condition |α|2+|β|2=1 (|α|2 and |β|2 indicate the probabilities of assuming the quantum levels |0> and |1>, respectively). These states (i.e., the energy levels) can be externally controlled with, for example, non-adiabatic pulses or microwaves.
In recent years, attempts have been made to configure or implement quantum computers by utilizing the qubits. It is expected that quantum computers utilizing qubits can solve problems that are practically unsolvable with conventional computers due to an enormous amount of computation.
For configuration of the quantum computers, there is a need to develop a quantum computation device for reading and outputting computational results.
For example, Patent Document 1 (Japanese Unexamined Patent Application Publication (JP-A) No. 2000-277723) discloses a quantum computation device. This quantum computation device includes an opposing electrode, a quantum box electrode opposed to the opposing electrode with a first tunnel barrier interposed therebetween, and a probe electrode connected to the quantum box electrode with a second tunnel barrier interposed therebetween. A gate electrode is coupled to the quantum box electrode with a gate capacitor interposed therebetween. In this case, the quantum box electrode and the opposing electrode are formed of superconducting material to act as a superconducting box electrode and a superconducting opposing electrode, respectively.
In the disclosed quantum computation device, the superconducting box electrode and the superconducting opposing electrode, which are provided across the first tunnel barrier, constitute a qubit section. Controlling a gate voltage applied to the gate terminal allows the state in the qubit section to be read out to the probe electrode via the second tunnel barrier. In this case, Cooper electron pairs move coherently by tunneling between the opposing electrode and the superconducting box electrode and between the superconducting box electrode and the probe electrode, so that the Cooper electron pairs are read out from the probe electrode. In this configuration, after the completion of readout of a Cooper electron pair, an initial state is automatically prepared. Thus, repeating the same computation and readout can cause direct current to be output. Thus, when this configuration is used, a readout circuit averages quasiparticles (Cooper pairs), extracted by the tunneling of the charge states of Cooper pairs in the superconducting box electrode, many times, to thereby provide detectable current.
Patent Document 1 discloses, as a related technology, a quantum computation device in which a readout circuit including a single-electron transistor (SET) is coupled to the superconducting box electrode via a capacitor. In this case, the single-electron transistor includes an island electrode, which is electrostatically coupled to the qubit section via a capacitor, and source and drain electrodes, which are connected to the island electrode via the corresponding tunnel barriers.
In this configuration, the state in the qubit section is transmitted to the island electrode via the readout capacitor and is read out as a change in a current value between the source electrode and the drain electrode. Such a quantum computation device having a readout circuit has a problem in the readout operation and speed.
Patent Document 2 (Japanese Unexamined Patent Application Publication (JP-A) No. 2004-200579) discloses another example of a quantum computation device having a readout circuit. The disclosed quantum computation device includes a qubit structure and a single electron transistor, which is provided so as to serve as a readout circuit. The qubit structure includes a quantum box electrode and an opposing electrode, which is coupled to the quantum box electrode with a first tunnel barrier interposed therebetween. Further, a trap electrode is coupled to the quantum box electrode with a second tunnel barrier interposed therebetween and is also coupled electrostatically to the island electrode of the single electron transistor via a capacitor. It has been pointed out that this configuration allows the readout of a quantum state by a single trial.
Patent Documents 1 and 2 disclose computation and readout of only a single qubit formed of a Cooper pair box. However, in order to achieve more realistic development of quantum computers, rather than a single qubit formed of a Cooper pair box, a requirement would be made about a technology for measuring or reading the states of two qubits (i.e., coupled qubits) by a single trial. Herein, it is to be noted that the double-qubit state can be expressed by a superposition of four states, namely, |00>, |10>, |01>, and |11>.
Conventionally, however, measurement, or readout, of double qubits has not been discussed. Additionally, the reality is that separating double-qubit states by a single trial has also not been studied.